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Build a High‐Performance All‐Solid‐State Lithium Battery through Introducing Competitive Coordination Induction Effect in Polymer‐Based Electrolyte

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We propose a new concept of competitive coordination induction effects (CCIE) and reveal the essential correlation between the local coordination structure and the interfacial chemistry in PEO-based PICE. The intrinsic mechanism of CCIE and its effects on both the Li+ conductivity and the interfacial stability at RT were clarified. The assembled all-solid-state batteries without adding interfacial wetting agent exhibit outstanding rate capability and cycling performance at 30 °C.


Abstract

Polymer-inorganic composite electrolytes (PICE) have attracted tremendous attention in all-solid-state lithium batteries (ASSLBs) due to facile processability. However, the poor Li+ conductivity at room temperature (RT) and interfacial instability severely hamper the practical application. Herein, we propose a concept of competitive coordination induction effects (CCIE) and reveal the essential correlation between the local coordination structure and the interfacial chemistry in PEO-based PICE. CCIE introduction greatly enhances the ionic conductivity and electrochemical performances of ASSLBs at 30 °C. Owing to the competitive coordination (Cs+ TFSI Li+, Cs+ C−O−C Li+ and 2,4,6-TFA Li TFSI) from the competitive cation (Cs+ from CsPF6) and molecule (2,4,6-TFA: 2,4,6-trifluoroaniline), a multimodal weak coordination environment of Li+ is constructed enabling a high efficient Li+ migration at 30 °C (Li+ conductivity: 6.25×10−4 S cm−1; tLi + =0.61). Since Cs+ tends to be enriched at the interface, TFSI and PF6 in situ form LiF-Li3N-Li2O-Li2S enriched solid electrolyte interface with electrostatic shielding effects. The assembled ASSLBs without adding interfacial wetting agent exhibit outstanding rate capability (LiFePO4: 147.44 mAh g−1@1 C and 107.41mAhg−1@2 C) and cycling stability at 30 °C (LiFePO4:94.65 %@200cycles@0.5 C; LiNi0.5Co0.2Mn0.3O2: 94.31 %@200 cycles@0.3 C). This work proposes a concept of CCIE and reveals its mechanism in designing PICE with high ionic conductivity as well as high interfacial compatibility at near RT for high-performance ASSLBs.

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